In fact, Stretch has made "software-configurability" truly accessible to all embedded system designers. Previous attempts to link processors and FPGAs have lead to complex and time-consuming hybrid hardware-plus-software development with unfamiliar configurable programming environments. Other attempts to create chips combining processors and FPGAs resulted in fixed processors and flexible peripherals; or "soft" processors that system designers could implement in standard FPGAs. These are ill suited to the architecture of microprocessors. Likewise, special FPGAs with "real" processors embedded into them are fixed and cannot be optimized.
Making Configurability Work
In contrast, Stretch's software-configurable processor approach allows system designers to extend the processor instruction-set. By offering a new way to combine software programmability (i.e., processor development model) and programmable logic — embedding the logic inside the processor architecture and programming this fabric using a conventional, standard C/C++ software-only environment — Stretch makes configurability workable and understandable.
Imagine the advantages of a chip solution that offers the time-to-market advantages and development ease traditionally associated with a general-purpose processor (GPP) or DSP-based system — combined with the performance boost of programmable logic. This would be the ideal solution for embedded system designers working on compute-intensive applications. Stretch is the first company to deliver such a solution.
Stretch's software-configurable processors meet the performance challenge by offering a familiar yet new design approach. Our software-configurable architecture achieves the following:
- Delivers the best of both hardware and software solutions
- The proven performance of tailored logic as instructions
- The time-to-performance of processors programmed in C/C++
- The reduction in development time and risk
- Cuts the system cost (trimming away multiple chips)
- Addresses virtually any compute-intensive application in any market
Embedding Programmable Logic in the Processor Architecture
The Performance of Logic with C/C++ Development Simplicity
Stretch's software-configurable processors are based on an innovative engine architecture that incorporates a Tensilica ® Xtensa ® RISC processor core and a powerful Stretch Instruction Set Extension Fabric (ISEF — Stretch's proprietary programmable fabric).
The FPGA-like ISEF logic is designed specifically for implementing variable-sized ALUs, multipliers, and shifters — all datapath extensions to the processor. The ISEF computes complex functions "in parallel" — i.e., like an FPGA — but tailored by system designers to meet the needs of their own compute-intensive applications. Using the ISEF, system designers extend the processor instruction set and define new instructions using only their C/C++ application code. As a result, they get C/C++ development simplicity with the performance of logic.
The Stretch engine unlocks the two following major RISC bottlenecks to provide an unparalleled level of performance:
- Granularity of computations : Unlike typical RISC processors ALUs that perform low-level operations such as shift, add, and multiply, the ISEF can execute thousands of operations as a single instruction (e.g. a triple DES instruction, a color space conversion instruction, or image resize instruction).
- Data and compute bandwidth : The Stretch engine uses thirty-two 128-bit wide registers coupled with 128-bit wide access to memory to feed data to the ISEF at a bandwidth not available on any other processor.
The Stretch Development Environment
Using Stretch's development tools, customers configure Stretch processors, using only their C/C++ code, for a diverse range of compute-intensive applications. Stretch's C compiler is unique in its ability to use C/C++ to program the processor and to configure the ISEF with powerful, application-specific instructions.
Stretch provides a complete suite of tools based on Windows XP and Linux, with a GUI-based Integrated Development Environment (IDE) that provides a single environment for performing the following tasks:
- Functional Development: Compile and run directly on x86 processors
- Performance Tuning: Compile and run using a cycle-accurate instruction set simulator
- System Verification: Run on the customers target system or a Stretch Development Board
- In-Circuit Debugging: Run on the target system via a JTAG interface
Developing software for Stretch's processors is a straight forward process. Stretch's profiler tool identifies the "hot spots" in an application C/C++ code. These C-functions are then implemented as new instructions that execute in a single cycle. The compiler then generates both the ISEF configuration as well as optimized application using those instructions. The compilation process produces new optimized instructions and machine code, and at the same time, configures the ISEF, automatically.