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Processor Array
The Processor Array provides the system designer with a natural and highly optimized way of constructing collaborative networks of processors which can be programmed and managed within a single unified development environment. Efficiently connecting and programming multiple devices has historically been difficult to achieve, resulting in longer design cycles and more complex development flows. The Processor Array in Stretch’s S6000 family of devices resolves this issue.

The S6000 Processor Array connects multiple Stretch devices into one single compute resource via a high speed hardware interface capable of transferring data between devices at 2.4GB/s (1.2GB/s in each direction). Each S6000 family device has four such interface ports, which are switched internally by means of a dedicated hardware switch. Data can be accepted on one port, inspected, and either be routed for processing by the local processing resources or directed to one of the other ports to be forwarded over the network. The entire communications process is handled in hardware without processor intervention.

Supplied PA-BIOS routines within the Stretch development environment allow for the creation and control of communications channels between processes running on devices within the network.

All Stretch devices residing in a Processor Array network share the same memory map and can collaborate on tasks. The topology of the network for a particular application is described within the development tools suite by means of a simple text file. The described network of devices is programmed as if it were a single compute resource. A single executable is then developed for the network and, at boot time, the master allocates tasks within the network members according to the distribution assigned by the designer.